SST 2017 S3 EOY QP

Page 1 of 22 [Turn over SECONDARY 3 END-OF-YEAR EXAMINATION ELECTRONICS 6063/01 25 September 2017 (Monday) 2 hours CANDIDATE NAME CLASS INDEX NUMBER READ THESE INSTRUCTIONS FIRST Do not turn over the page until you are told to do so. Write your name, class, and index number in the spaces provided above. Write in dark blue or black ink pen. You may use a soft pencil for any diagrams, graphs or rough working. Do not use staples, paper clips, highlighters, and glue or correction fluid/tape. Sections A and B Answer all the questions. Write your answers in the spaces provided on the question paper. Approved electronic calculators are allowed for use in this paper. The number of marks is given in brackets [ ] at the end of each question or part question. The total number of marks for this paper is 100. This document consists of 22 printed pages including the cover page FOR EXAMINER’S USE Section A / 40 Section B / 60 TOTAL / 100

Page 2 of 22 [Turn over Resistor Colour Code Bipolar Junction Transistor (BJT) Current gain β = collector current Base current Voltage gain (Voltage-divider biased CE amplifier, emitter resistor unbypassed) ≅ _ RC RE

Page 3 of 22 [Turn over Section A Answer all questions. Write your answers in the spaces provided. 1 A DC electric motor used in the fan blower has an efficiency of 90%. The motor is running on 230 V power supply and delivers 400 W output. (a) Calculate the current drawn by the motor. [2] current=…………………………. (b) Determine the power loss in the motor. [2] power loss=………………………. (c) The power loss in the motor is mainly due to the winding resistance. Determine the resistance of the motor winding. [2] resistance=……………………… (d) Determine the input electrical energy to the motor after operating for one hour. [2] energy=…………………………. [Total: 8 marks]

Page 4 of 22 [Turn over 2 A sinusoidal waveform is shown in Fig. 2.1. (a) Calculate the frequency of the waveform. [2] frequency =……………………………. (b) Determine the peak-to-peak voltage Vpp. [1] Vpp=…………….………….….. (c) Determine the dc level. [1] dc level=…………….………….….. [Total: 4 marks] Fig. 2.1 V / V t / ms 3.0 30 0

Page 5 of 22 [Turn over 3 Fig. 3.1, show a physical connection of three capacitors. Fig. 3.1 (a) Complete the circuit diagram in Fig. 3.2 to represent this connection. [2] Fig. 3.2

Page 6 of 22 [Turn over (b) Fig. 3.3 shows three capacitors connected. The capacitors are initially uncharged. Given the effective capacitance (CT) of the circuit is 10µF. Fig. 3.3 (i) Calculate the effective capacitance of C1 and C2 . [2] effective capacitance of C1 and C2=………………. (ii) Calculate the unknown capacitance C3. [2] capacitance C3=………………. (iii) Calculate the voltage across capacitor C2. [2] voltage across C2=……………… [Total: 8 marks] C1 6µF C2 12µF C3E 12 V

Page 7 of 22 [Turn over 4 Diodes are commonly used in circuit design. (a) Describe the basic structure of the PN junction diode. [1] ….……….……..…….…………………………………….………..…………………….… ….……….………….…………………………………….………..……………………...… ….……….………….…………………………………….………..……………………...… (b) Explain how the PN junction diode is biased in the forward and reverse direction. [2] ….……….……..…….…………………………………….………..…………………….… ….……….………….…………………………………….………..……………………...… ….……….………….…………………………………….………..……………………...… (c) Fig. 4.1 shows a circuit connected using four diodes; D1, D2, D3 and D4. (i) Identify the circuit shown on Fig. 4.1: …………………………………......... [1] Vin Vout Fig. 4.1

Page 8 of 22 [Turn over (ii) The waveform of the input voltage Vin is shown on Fig. 4.2. On the same figure, draw the waveform of Vout using the ideal diode model. [2] [Total: 6 marks] Vin/V t/ s Vout/ V t/ s 9.0 -9.0 Fig. 4.2

Page 9 of 22 [Turn over 5 Fig. 5.1 shows a common emitter amplifier. The transistor has a VBE = 0.7 V and βdc =100. Collector current IC = 1.30 mA. (a) Determine the emitter voltage VE. [2] VE=…………….………….….. (b) Determine the base voltage VB. [2] VB=…………….………….….. (c) Determine the voltage gain Av. [2] Av=…………….………….….. (d) If all the resistors in the circuit are increased by a factor of 10, state and explain the change, if any, in the voltage gain Av. [2] ….……….……..…….…………………………………….………..…………………….… ….……….………….…………………………………….………..……………………...… ….……….………….…………………………………….………..……………………...… [Total: 8 marks] Fig. 5.1 VB VC VE R1 R2 RC RE

Page 10 of 22 [Turn over 6 Fig. 6.1 shows a logic circuit. Fig. 6.1 (a) Write down the output Boolean expression for the logic circuit in Fig.6.1. [2] (b) Implement the logic circuit in Fig. 6.1 using NAND gates only. [4] [Total: 6 marks] X Fig. 6.1