2024 SST Electronics Prelims MS

1 School of Science and Technology, Singapore Preliminary Examination 2024 Electronics Mark Scheme Qn Answer Mark Scheme Marker’s Comments 1 Zener diode PNP bipolar junction transistor AC source B1 each Accept PNP BJT or PNP transistor 2 (a) Violet, green, black, gold B2 4 bands correct B1 3 bands correct (b) P = I2R = (80 × 10-3)2 × 75 = 0.48 W M1 A1 (c) 1 W (more than twice the maximum power) B1 3 (a) I1 = 2 mA I2 = 10 mA I3 = 13 mA B1 B1 B1 (b) V1 = 1.6 V V2 = 2.9 V B1 each

2 4 (a) B1 for period B1 for voltage levels B1 for duty cycle No mark if waveform is not rectangular. (b) The signal repeats itself at regularly intervals. B1 5 (a) 4700 pF B1 (b) Capacitor A is non-polarised while capacitor B is polarised. B1 6 (a) B2 All diodes correct positions and direction B1 two diodes correct positions and direction No mark if symbol is wrong.

3 (b) Diodes allow currents to pass through in one direction only. B1 (c) • B2 for all 4 halves correct • B1 for 2 or 3 halves correct 7 (a) HIGH LOW B1 for both correct (b) R1 connects point A to 5 V when S1 is open. This prevents point A from floating when S1 is open. Alternative answer: R1 provides a resistance between 5 V and 0 V. This prevents a short circuit between 5 V and 0V when the switch is closed. B1 B1 B1 B1 (c) B1 Point A to base B1 Collector to point B and to 5 V through resistor B1 Emitter to ground

4 8 (a) A universal gate is a logic gate that can be used to implement all other types of logic gates. B1 (b) (i) B1 (ii) B2 All correct B1 Only invert both inputs 9 (a) 0001 0100 B1 (b) 1110 B1 (c) Advantage: Ready / easy to be used for decimal display Disadvantage: more bits to represent the number / needs more memory to store B1 B1 10 (a) Pin 2 causes output to go HIGH when the voltage at the pin goes below 1/3 of Vcc Pin 6 causes output to go LOW when the voltage at the pin goes above 2/3 of Vcc B1 B1 B1 B1 (b) 𝑇 = (𝑅1+2𝑅2)𝐶 1.44 ; 𝑇 = (5.6×103 + 2 × 33×103)10×10−6 1.44 = 0.50 Hz M1 A1 (c) C1 charges through both R1 and R2, but discharges through R2 only. B1 (d) Q = C × V; = 10 μF × 4.0 V = 40 μC M1 A1

5 (e) The period will increase. When two capacitors are connected in parallel, the effective capacitance increases. C1 will take longer to charge and discharge. B1 B1 B1 (f) Voltage across R3 = 8.1 – 2.0 = 6.1 V R3, 𝑅 = 𝑉 𝐼 = 6.1 20×10−3 = 305 Ω Choose 330 Ω (Accept 300 Ω) M1 M1 A1 11 (a) G L P Q 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1 B3 All rows correct B2 6 or 7 rows correct B1 4 or 5 rows correct (b) Q = 𝐺̅ ∙ 𝐿 ∙ 𝑃 + 𝐺 ∙ 𝐿̅ ∙ 𝑃 + 𝐺 ∙ 𝐿 ∙ 𝑃̅ + 𝐺 ∙ 𝐿 ∙ 𝑃 B1 (c) LP G 00 01 11 10 0 0 0 1 0 1 0 1 1 1 B3 All loops correct B2 Two loops correct B1 One loop correct (d) Q = 𝐿 ∙