Jurongvile Prelim 2024

JVSS PRELIMINARY EXAM 2024 4E Electronics 6063/01 [Turn over JURONGVILLE SECONDARY SCHOOL PRELIMINARY EXAMINATION 2024 Secondary 4 Express STUDENT NAME CLASS INDEX NUMBER ELECTRONICS 6063/01 Paper 1 13 AUG 2024 2 hours Candidates answer on the Question Paper. No Additional Materials are required. READ THESE INSTRUCTIONS FIRST Write your name, class and index number in the spaces on all the work you hand in. Write in dark blue or black pen. You may use pencil for drawing diagrams or graphs. Do not use staples, paper clips, highlighters, glue or correction fluid. Section A Answer all questions. Section B Answer all questions. The number of marks is given in brackets [ ] at the end of each question or part question. The total number of marks for this paper is 100. DO NOT OPEN THE BOOKLET UNTIL YOU ARE TOLD TO DO SO This document consists of 22 printed pages. Setter: Mdm Wong Ruting For Examiner’s Use 100 O O O O

2 JVSS PRELIMINARY EXAM 2024 4E Electronics 6063/01 DATASHEET RESISTOR COLOUR CODE 1st Colour Band 1st Digit 2nd Colour Band 2nd Digit 3rd Colour Band Multiplier 4th Colour Band Tolerance Black 0 Black 0 Black 0 Gold ± 5% Brown 1 Brown 1 Brown 1 Red ± 2% Red 2 Red 2 Red 2 Orange 3 Orange 3 Orange 3 Yellow 4 Yellow 4 Yellow 4 Green 5 Green 5 Green 5 Blue 6 Blue 6 Blue 6 Violet 7 Violet 7 Violet 7 Grey 8 Grey 8 Silver 0.01 White 9 White 9 Gold 0.1 STANDARD VALUES FOR RESISTORS (E24 SERIES) 1.0 1.1 1.2 1.3 1.5 1.6 1.8 2.0 2.2 2.4 2.7 3.0 3.3 3.6 3.9 4.3 4.7 5.1 5.6 6.2 6.8 7.5 8.2 9.1 and multiples of ten. FORMULAE Astable and monostable generators using 555 timers Monostable mode Period T = 1.1RC 𝑃𝑒𝑟𝑖𝑜𝑑 𝑇 = (𝑅1 + 2𝑅2)𝐶 1.44 Astable mode frequency Bipolar Junction Transistor (BJT) Current gain 𝛽 = 𝐶𝑜𝑙𝑙𝑒𝑐𝑡𝑜𝑟 𝐶𝑢𝑟𝑟𝑒𝑛𝑡 𝐵𝑎𝑠𝑒 𝐶𝑢𝑟𝑟𝑒𝑛𝑡 Voltage gain (for voltage-divider biased CE amplifier, emitter resistor unbypassed)

3 JVSS PRELIMINARY EXAM 2024 4E Electronics 6063/01 [Turn over Table on Boolean algebra Single-variable theorems Laws of Complementation • 0 = 1 • 1 = 0 • A = A AND Laws • A · 0 = 0 • A · 1 = A • A · A = A • A · A = 0 OR Laws • A + 0 = A • A + 1 = 1 • A + A = A • A + A = 1 Multivariable theorems Commutative Laws • A + B = B + A • A · B = B · A Associative Laws • A + (B + C) = (A + B) + C = A + B + C • A · (B · C) = (A · B) · C = A · B · C Distributive Laws • A · (B + C) = A · B + A · C • (A + B) · (C + D) = A· C + B · C + A · D + B · D Absorption Laws • A + A · B = A • A · (A + B) = A • A + A · B = A + B • A · (A + B) = A · B DeMorgan’s Theorems • (A + B) = A · B • (A . B) = A + B

4 JVSS PRELIMINARY EXAM 2024 4E Electronics 6063/01 SECTION A Answer all questions in this section. 1 Complete Table 1.1. Table 1.1 Component Name Component Symbol (a) (b) PNP transistor (c) (d) Ammeter (e) SPDT Switch (f) [6]

5 JVSS PRELIMINARY EXAM 2024 4E Electronics 6063/01 [Turn over 2 Complete Fig. 2.1 by labelling the colour bands for a 560 kΩ resistor. Fig. 2.1 [3] 3 Complete Table 3.1 by converting each measured value. Table 3.1 Measured value Converted value 1800 µA A 470 pF nF 0.5 mV µV 56000 Ω kΩ [4] 4 Fig. 4.1 shows current entering and leaving the nodes. Fig. 4.1 Calculate current, I1. …..…....………………………………………………………………………………………………..…. [1] ……………………. ……………………. ……………………. Gold 0.8 A 0.2 A 0.15 A I1

6 JVSS PRELIMINARY EXAM 2024 4E Electronics 6063/01 5 Fig. 5.1 shows a resistor network. Fig. 5.1 (a) Calculate the voltage V1. ……………………………………………………………………………………………………… [4] (b) Using the voltage from part (a), calculate the current flowing through I2. ……………………………………………………………………………………………………… [2] V1 I2

7 JVSS PRELIMINARY EXAM 2024 4E Electronics 6063/01 [Turn over 6 (a) State what is a non-periodic signal. ……………………………………………………………………………………………………….…… …....………………………………………………………………………………………………..…. [1] (b) On Fig. 6.1, draw a non-periodic signal. Fig. 6.1 [1] (c) Determine the duty cycle of the rectangular waveform shown in Fig. 6.2. Fig. 6.2 ………………………………………………………………………………………………………… [2]

8 JVSS PRELIMINARY EXAM 2024 4E Electronics 6063/01 7 Fig. 7.1 shows a circuit using bulbs and diodes. Fig. 7.1 Table 7.1 shows the state of the bulb when SW1 is closed. Table 7.1 Bulb State ON/OFF LP1 OFF LP2 ON LP3 ON (a) Complete the circuit diagram in Fig. 7.1, showing how the diodes D2 and D3 should be arranged to achieve the results shown in Table 7.1. [2] (b) How is D1 biased in Fig. 7.1? ……………………………………………………………………………………………………..…. [1] D2 D3

9 JVSS PRELIMINARY EXAM 2024 4E Electronics 6063/01 [Turn over (c) In Fig. 7.2, complete the I-V graph for a practical diode. Fig. 7.2 (d) Explain why the semiconductor diode is a non-ohmic conductor. ……………………………………………………………………………………………………….…… ……………………………………………………………………………………………………….…… …....………………………………………………………………………………………………..…. [2] 8 (a) Find the binary-coded decimal. 0010 + 1000.0001 = ……………………………………………………… (b) List two advantages of digital systems over analogue systems. 1 ……………………………………………………………………………………………....…………. ………………………………………………………………………………………………....………… 2 ……………………………………………………………………………………………....…………. ………………………………………………………………………………………………....………[2] I V [2] [1]

10 JVSS PRELIMINARY EXAM 2024 4E Electronics 6063/01 9 Fig. 9.1 shows a logic diagram constructed by an electronics student. Fig. 9.1 (a) On Table 9.1, complete the truth table for this logic diagram. Table 9.1 A B C D Q 0 0 0 1 1 0 1 1 [2] (b) State the Boolean expressions for the logic signals at C, D and Q in terms of inputs A and B. C = …………………………………………………………………………………………....……… [1] D = …………………………………………………………………………………………....……… [1] Q = …………………………………………………………………………………………....……… [2]